Our invention relates to a method of, and apparatus for, data transmission between the internal memory of a microcomputer and an input/output device interfaced therewith.
As is well known, the direct memory access (DMA) method is usually employed for data transmission between the random access memory of a microcomputer memory and an external file memory constituting a part of the input/output device interfaced with the microcomputer. The DMA makes possible direct, and therefore more efficient, data transmission between microcomputer memory and file memory, as distinguished from programmed data transmission under the control of a central processor unit (CPU) built into the microcomputer. DMA data transmission resolves itself into the following three modes, all familiar to the specialists:
1. Cycle Steal Mode
DMA transmission and programmed CPU transmission alternate at regular intervals of one to several memory cycles. This mode offers the advantage of good system response during both DMA and CPU transmissions. In this mode, however, the same bus system is used for both DMA and CPU transmissions, with the CPU electrically coupled to and uncoupled from the bus system at regular intervals. If a substantial difference exists between the processing time required for CPU transmission and that required for DMA transmission, either of the two transmission modes that must transmit a greater amount of data (e.g. DMA transmission) demands a longer time for the complete transfer of the required amount of data. The need for the frequent coupling and uncoupling of the CPU to and from the bus system is another weakness of the Cycle Steal mode.
2. Burst Mode
When DMA transmission is required, the CPU is held inactive until the DMA transmission of a prescribed amount of data is completed. Each period of DMA transmission in the Burst mode is much longer than that in the Cycle Steal mode. The efficiency of DMA data transmission is gained, however, at the sacrifice of the response of the CPU, the latter being held isolated from the bus system during the extended period of DMA transmission. The Burst mode is therefore unsuited for applications where immediate response is essential.
3. Dual Bus Mode
Separate buses are used for DMA transmission and CPU transmission. Although response is good in both modes of operation, the separate buses inevitably make the hardware complex and expensive. The system configuration becomes even more complex in cases where the CPU requires data for DMA transmission, because then bus switches are needed for connection and disconnection of the two buses.
Thus, all the conventional methods of DMA data transmission have their own strengths and weaknesses. None of them is truly satisfactory by itself.